Abstract

Total ionizing dose tolerances of current integrated circuits are limited to 3–10 kGy because semiconductor devices are fundamentally vulnerable to radiation. However, using programmable architecture, the total ionizing dose tolerances of integrated circuits can be increased if the integrated circuits can be repaired each time a permanent failure occurs. Nevertheless, current programmable devices cannot allow such repairable use because their serial programming functions fail immediately, even if only a few transistors on the devices are damaged. To increase the radiation tolerance of integrated circuits, this paper presents a proposal of a new optoelectronic programmable device with a parallel light configuration architecture instead of current field programmable gate arrays which have a serial configuration architecture. This demonstration confirms 1.9 MGy radiation tolerance on an optoelectronic programmable device using a non-radiation-hardened standard complementary metal oxide semiconductor process.

© 2017 Optical Society of America

Full Article  |  PDF Article
OSA Recommended Articles
High-speed scrubbing demonstration using an optically reconfigurable gate array

Takumi Fujimori and Minoru Watanabe
Opt. Express 25(7) 7807-7817 (2017)

Tolerance of holographic polymer-dispersed liquid crystal memory for gamma-ray irradiation

Akifumi Ogiwara, Minoru Watanabe, and Yoshizumi Ito
Appl. Opt. 56(16) 4854-4860 (2017)

Dynamic optically reconfigurable gate array very large-scale integration with partial reconfiguration capability

Daisaku Seto, Mao Nakajima, and Minoru Watanabe
Appl. Opt. 49(36) 6986-6994 (2010)

References

  • View by:
  • |
  • |
  • |

  1. C. M. Szabo, A. Duncan, K. A. LaBel, M. Kay, P. Bruner, M. Krzesniak, and L. Dong, “Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor / System-on-a-Chip,” in Proceedings of the IEEE Radiation Effects Data Workshop, 1–8 (2015).
  2. F. T. Brady, T. Scott, R. Brown, J. Damato, and N. F. Haddad, “Fully-depleted submicron SOI for radiation hardened applications,” IEEE Trans. on Nucl. Sci. 416(6), 2304–2309 (1994).
    [Crossref]
  3. M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
    [Crossref]
  4. A. Bacchini, G. Furano, M. Rovatti, and M. Ottavi, “Total Ionizing Dose Effects on DRAM Data Retention Time,” IEEE Trans. on Nucl. Sci. 61(6), 3690–3693 (2014).
    [Crossref]
  5. L. T. Clark, K. E. Holbert, J. W. Adams, H. Navale, and B. C. Anderson, “Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response,” IEEE Trans. on Nucl. Sci. 62(6), 2431–2439 (2015).
    [Crossref]
  6. XILINX corp. Virtex UltraScale+. http://www.xilinx.com/products/silicon-devices/fpga.html .
  7. ALTERA corp. Stratix 10. FPGA & SOC. https://www.altera.co.jp/products/fpga/stratix-series/stratix-10/overview.html .
  8. ALTERA corp. MAX 10. https://www.altera.co.jp/products/fpga/max-series/max-10/overview.html .
  9. H. Ito and M. Watanabe, “Total ionizing dose tolerance of the serial configuration on cyclone II FPGA,” IEEE International Conference on Space Optical Systems and Applications, 1–4 (2015).
  10. X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
    [Crossref]
  11. N. Rezzak, J. J. Wang, D. Dsilva, and N. Jat, “TID and SEE Characterization of Microsemi’s 4th Generation Radiation Tolerant RTG4 Flash-Based FPGA,” IEEE Radiation Effects Data Workshop, 1–6 (2015).
  12. XILINX corp. Radiation-Hardened, Space-Grade Virtex-5QV Family Overview. http://japan.xilinx.com/support.html .
  13. Y. Ueno and M. Watanabe, “Fiber remote configuration for an optically reconfigurable gate array with four configuration contexts,” Opt. Commun. 283(23), 4614–4618 (2010).
    [Crossref]
  14. M. Nakajima and M. Watanabe, “Fast optical reconfiguration of a nine-context DORGA using a speed adjustment control,” ACM Transaction on Reconfigurable Technology and Systems 4(2), 15 (2011).
  15. S. Kubota and M. Watanabe, “A four-context programmable optically reconfigurable gate array with a reflective silver-halide holographic memory,” IEEE Photonics Journal 3(4), 665–675 (2011).
    [Crossref]
  16. R. Moriwaki and M. Watanabe, “Optical configuration acceleration on a new optically reconfigurable gate array VLSI using a negative logic implementation,” Appl. Opt. 52(9), 1939–1946 (2013).
    [Crossref] [PubMed]
  17. T. Fujimori and M. Watanabe, “High-speed scrubbing demonstration using an optically reconfigurable gate array,” Opt. Express 25(7), 7807–7817 (2017).
    [Crossref] [PubMed]
  18. D. Seto and M. Watanabe, “Radiation-hardened optically reconfigurable gate array exploiting holographic memory characteristics,” Japanese Journal of Applied Physics,  54(9S), 09MA06 (2015).
    [Crossref]

2017 (2)

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

T. Fujimori and M. Watanabe, “High-speed scrubbing demonstration using an optically reconfigurable gate array,” Opt. Express 25(7), 7807–7817 (2017).
[Crossref] [PubMed]

2015 (2)

D. Seto and M. Watanabe, “Radiation-hardened optically reconfigurable gate array exploiting holographic memory characteristics,” Japanese Journal of Applied Physics,  54(9S), 09MA06 (2015).
[Crossref]

L. T. Clark, K. E. Holbert, J. W. Adams, H. Navale, and B. C. Anderson, “Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response,” IEEE Trans. on Nucl. Sci. 62(6), 2431–2439 (2015).
[Crossref]

2014 (1)

A. Bacchini, G. Furano, M. Rovatti, and M. Ottavi, “Total Ionizing Dose Effects on DRAM Data Retention Time,” IEEE Trans. on Nucl. Sci. 61(6), 3690–3693 (2014).
[Crossref]

2013 (2)

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

R. Moriwaki and M. Watanabe, “Optical configuration acceleration on a new optically reconfigurable gate array VLSI using a negative logic implementation,” Appl. Opt. 52(9), 1939–1946 (2013).
[Crossref] [PubMed]

2011 (2)

M. Nakajima and M. Watanabe, “Fast optical reconfiguration of a nine-context DORGA using a speed adjustment control,” ACM Transaction on Reconfigurable Technology and Systems 4(2), 15 (2011).

S. Kubota and M. Watanabe, “A four-context programmable optically reconfigurable gate array with a reflective silver-halide holographic memory,” IEEE Photonics Journal 3(4), 665–675 (2011).
[Crossref]

2010 (1)

Y. Ueno and M. Watanabe, “Fiber remote configuration for an optically reconfigurable gate array with four configuration contexts,” Opt. Commun. 283(23), 4614–4618 (2010).
[Crossref]

1994 (1)

F. T. Brady, T. Scott, R. Brown, J. Damato, and N. F. Haddad, “Fully-depleted submicron SOI for radiation hardened applications,” IEEE Trans. on Nucl. Sci. 416(6), 2304–2309 (1994).
[Crossref]

Adams, J. W.

L. T. Clark, K. E. Holbert, J. W. Adams, H. Navale, and B. C. Anderson, “Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response,” IEEE Trans. on Nucl. Sci. 62(6), 2431–2439 (2015).
[Crossref]

Alles, M. L.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

An, Q.

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

Anderson, B. C.

L. T. Clark, K. E. Holbert, J. W. Adams, H. Navale, and B. C. Anderson, “Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response,” IEEE Trans. on Nucl. Sci. 62(6), 2431–2439 (2015).
[Crossref]

Bacchini, A.

A. Bacchini, G. Furano, M. Rovatti, and M. Ottavi, “Total Ionizing Dose Effects on DRAM Data Retention Time,” IEEE Trans. on Nucl. Sci. 61(6), 3690–3693 (2014).
[Crossref]

Ball, D. R.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Brady, F. T.

F. T. Brady, T. Scott, R. Brown, J. Damato, and N. F. Haddad, “Fully-depleted submicron SOI for radiation hardened applications,” IEEE Trans. on Nucl. Sci. 416(6), 2304–2309 (1994).
[Crossref]

Brown, R.

F. T. Brady, T. Scott, R. Brown, J. Damato, and N. F. Haddad, “Fully-depleted submicron SOI for radiation hardened applications,” IEEE Trans. on Nucl. Sci. 416(6), 2304–2309 (1994).
[Crossref]

Bruner, P.

C. M. Szabo, A. Duncan, K. A. LaBel, M. Kay, P. Bruner, M. Krzesniak, and L. Dong, “Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor / System-on-a-Chip,” in Proceedings of the IEEE Radiation Effects Data Workshop, 1–8 (2015).

Clark, L. T.

L. T. Clark, K. E. Holbert, J. W. Adams, H. Navale, and B. C. Anderson, “Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response,” IEEE Trans. on Nucl. Sci. 62(6), 2431–2439 (2015).
[Crossref]

Damato, J.

F. T. Brady, T. Scott, R. Brown, J. Damato, and N. F. Haddad, “Fully-depleted submicron SOI for radiation hardened applications,” IEEE Trans. on Nucl. Sci. 416(6), 2304–2309 (1994).
[Crossref]

Dong, L.

C. M. Szabo, A. Duncan, K. A. LaBel, M. Kay, P. Bruner, M. Krzesniak, and L. Dong, “Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor / System-on-a-Chip,” in Proceedings of the IEEE Radiation Effects Data Workshop, 1–8 (2015).

Draper, B. L.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Dsilva, D.

N. Rezzak, J. J. Wang, D. Dsilva, and N. Jat, “TID and SEE Characterization of Microsemi’s 4th Generation Radiation Tolerant RTG4 Flash-Based FPGA,” IEEE Radiation Effects Data Workshop, 1–6 (2015).

Duncan, A.

C. M. Szabo, A. Duncan, K. A. LaBel, M. Kay, P. Bruner, M. Krzesniak, and L. Dong, “Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor / System-on-a-Chip,” in Proceedings of the IEEE Radiation Effects Data Workshop, 1–8 (2015).

Eller, M.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Felix, J. A.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Feng, C.

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

Fujimori, T.

Furano, G.

A. Bacchini, G. Furano, M. Rovatti, and M. Ottavi, “Total Ionizing Dose Effects on DRAM Data Retention Time,” IEEE Trans. on Nucl. Sci. 61(6), 3690–3693 (2014).
[Crossref]

Haddad, N. F.

F. T. Brady, T. Scott, R. Brown, J. Damato, and N. F. Haddad, “Fully-depleted submicron SOI for radiation hardened applications,” IEEE Trans. on Nucl. Sci. 416(6), 2304–2309 (1994).
[Crossref]

Haeffner, T. D.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Hao, X.

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

Holbert, K. E.

L. T. Clark, K. E. Holbert, J. W. Adams, H. Navale, and B. C. Anderson, “Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response,” IEEE Trans. on Nucl. Sci. 62(6), 2431–2439 (2015).
[Crossref]

Ito, H.

H. Ito and M. Watanabe, “Total ionizing dose tolerance of the serial configuration on cyclone II FPGA,” IEEE International Conference on Space Optical Systems and Applications, 1–4 (2015).

Jat, N.

N. Rezzak, J. J. Wang, D. Dsilva, and N. Jat, “TID and SEE Characterization of Microsemi’s 4th Generation Radiation Tolerant RTG4 Flash-Based FPGA,” IEEE Radiation Effects Data Workshop, 1–6 (2015).

Kauppila, J. S.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Kay, M.

C. M. Szabo, A. Duncan, K. A. LaBel, M. Kay, P. Bruner, M. Krzesniak, and L. Dong, “Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor / System-on-a-Chip,” in Proceedings of the IEEE Radiation Effects Data Workshop, 1–8 (2015).

King, M. P.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Krzesniak, M.

C. M. Szabo, A. Duncan, K. A. LaBel, M. Kay, P. Bruner, M. Krzesniak, and L. Dong, “Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor / System-on-a-Chip,” in Proceedings of the IEEE Radiation Effects Data Workshop, 1–8 (2015).

Kubota, S.

S. Kubota and M. Watanabe, “A four-context programmable optically reconfigurable gate array with a reflective silver-halide holographic memory,” IEEE Photonics Journal 3(4), 665–675 (2011).
[Crossref]

LaBel, K. A.

C. M. Szabo, A. Duncan, K. A. LaBel, M. Kay, P. Bruner, M. Krzesniak, and L. Dong, “Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor / System-on-a-Chip,” in Proceedings of the IEEE Radiation Effects Data Workshop, 1–8 (2015).

Liu, S.

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

Massengill, L. W.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Meisenheimer, T. L.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Miao, B.

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

Moriwaki, R.

Nakajima, M.

M. Nakajima and M. Watanabe, “Fast optical reconfiguration of a nine-context DORGA using a speed adjustment control,” ACM Transaction on Reconfigurable Technology and Systems 4(2), 15 (2011).

Navale, H.

L. T. Clark, K. E. Holbert, J. W. Adams, H. Navale, and B. C. Anderson, “Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response,” IEEE Trans. on Nucl. Sci. 62(6), 2431–2439 (2015).
[Crossref]

Ottavi, M.

A. Bacchini, G. Furano, M. Rovatti, and M. Ottavi, “Total Ionizing Dose Effects on DRAM Data Retention Time,” IEEE Trans. on Nucl. Sci. 61(6), 3690–3693 (2014).
[Crossref]

Qin, X.

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

Rezzak, N.

N. Rezzak, J. J. Wang, D. Dsilva, and N. Jat, “TID and SEE Characterization of Microsemi’s 4th Generation Radiation Tolerant RTG4 Flash-Based FPGA,” IEEE Radiation Effects Data Workshop, 1–6 (2015).

Rice, W. C.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Rovatti, M.

A. Bacchini, G. Furano, M. Rovatti, and M. Ottavi, “Total Ionizing Dose Effects on DRAM Data Retention Time,” IEEE Trans. on Nucl. Sci. 61(6), 3690–3693 (2014).
[Crossref]

Samavedam, S.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Scott, T.

F. T. Brady, T. Scott, R. Brown, J. Damato, and N. F. Haddad, “Fully-depleted submicron SOI for radiation hardened applications,” IEEE Trans. on Nucl. Sci. 416(6), 2304–2309 (1994).
[Crossref]

Seto, D.

D. Seto and M. Watanabe, “Radiation-hardened optically reconfigurable gate array exploiting holographic memory characteristics,” Japanese Journal of Applied Physics,  54(9S), 09MA06 (2015).
[Crossref]

Shaneyfelt, M. R.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Shetler, K. J.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Silva, A. I.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Szabo, C. M.

C. M. Szabo, A. Duncan, K. A. LaBel, M. Kay, P. Bruner, M. Krzesniak, and L. Dong, “Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor / System-on-a-Chip,” in Proceedings of the IEEE Radiation Effects Data Workshop, 1–8 (2015).

Ueno, Y.

Y. Ueno and M. Watanabe, “Fiber remote configuration for an optically reconfigurable gate array with four configuration contexts,” Opt. Commun. 283(23), 4614–4618 (2010).
[Crossref]

Wang, J. J.

N. Rezzak, J. J. Wang, D. Dsilva, and N. Jat, “TID and SEE Characterization of Microsemi’s 4th Generation Radiation Tolerant RTG4 Flash-Based FPGA,” IEEE Radiation Effects Data Workshop, 1–6 (2015).

Watanabe, M.

T. Fujimori and M. Watanabe, “High-speed scrubbing demonstration using an optically reconfigurable gate array,” Opt. Express 25(7), 7807–7817 (2017).
[Crossref] [PubMed]

D. Seto and M. Watanabe, “Radiation-hardened optically reconfigurable gate array exploiting holographic memory characteristics,” Japanese Journal of Applied Physics,  54(9S), 09MA06 (2015).
[Crossref]

R. Moriwaki and M. Watanabe, “Optical configuration acceleration on a new optically reconfigurable gate array VLSI using a negative logic implementation,” Appl. Opt. 52(9), 1939–1946 (2013).
[Crossref] [PubMed]

M. Nakajima and M. Watanabe, “Fast optical reconfiguration of a nine-context DORGA using a speed adjustment control,” ACM Transaction on Reconfigurable Technology and Systems 4(2), 15 (2011).

S. Kubota and M. Watanabe, “A four-context programmable optically reconfigurable gate array with a reflective silver-halide holographic memory,” IEEE Photonics Journal 3(4), 665–675 (2011).
[Crossref]

Y. Ueno and M. Watanabe, “Fiber remote configuration for an optically reconfigurable gate array with four configuration contexts,” Opt. Commun. 283(23), 4614–4618 (2010).
[Crossref]

H. Ito and M. Watanabe, “Total ionizing dose tolerance of the serial configuration on cyclone II FPGA,” IEEE International Conference on Space Optical Systems and Applications, 1–4 (2015).

Wu, X.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Zhang, D.

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

Zhang, E. X.

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

Zhao, L.

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

ACM Transaction on Reconfigurable Technology and Systems (1)

M. Nakajima and M. Watanabe, “Fast optical reconfiguration of a nine-context DORGA using a speed adjustment control,” ACM Transaction on Reconfigurable Technology and Systems 4(2), 15 (2011).

Appl. Opt. (1)

IEEE Photonics Journal (1)

S. Kubota and M. Watanabe, “A four-context programmable optically reconfigurable gate array with a reflective silver-halide holographic memory,” IEEE Photonics Journal 3(4), 665–675 (2011).
[Crossref]

IEEE Trans. on Nucl. Sci (1)

X. Qin, C. Feng, D. Zhang, B. Miao, L. Zhao, X. Hao, S. Liu, and Q. An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application,” IEEE Trans. on Nucl. Sci,  60(5), 3550–3556 (2013).
[Crossref]

IEEE Trans. on Nucl. Sci. (4)

F. T. Brady, T. Scott, R. Brown, J. Damato, and N. F. Haddad, “Fully-depleted submicron SOI for radiation hardened applications,” IEEE Trans. on Nucl. Sci. 416(6), 2304–2309 (1994).
[Crossref]

M. P. King, X. Wu, M. Eller, S. Samavedam, M. R. Shaneyfelt, A. I. Silva, B. L. Draper, W. C. Rice, T. L. Meisenheimer, J. A. Felix, E. X. Zhang, T. D. Haeffner, D. R. Ball, K. J. Shetler, M. L. Alles, J. S. Kauppila, and L. W. Massengill, “Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance,” IEEE Trans. on Nucl. Sci. 64(1), 285–292 (2017).
[Crossref]

A. Bacchini, G. Furano, M. Rovatti, and M. Ottavi, “Total Ionizing Dose Effects on DRAM Data Retention Time,” IEEE Trans. on Nucl. Sci. 61(6), 3690–3693 (2014).
[Crossref]

L. T. Clark, K. E. Holbert, J. W. Adams, H. Navale, and B. C. Anderson, “Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response,” IEEE Trans. on Nucl. Sci. 62(6), 2431–2439 (2015).
[Crossref]

Japanese Journal of Applied Physics (1)

D. Seto and M. Watanabe, “Radiation-hardened optically reconfigurable gate array exploiting holographic memory characteristics,” Japanese Journal of Applied Physics,  54(9S), 09MA06 (2015).
[Crossref]

Opt. Commun. (1)

Y. Ueno and M. Watanabe, “Fiber remote configuration for an optically reconfigurable gate array with four configuration contexts,” Opt. Commun. 283(23), 4614–4618 (2010).
[Crossref]

Opt. Express (1)

Other (7)

C. M. Szabo, A. Duncan, K. A. LaBel, M. Kay, P. Bruner, M. Krzesniak, and L. Dong, “Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor / System-on-a-Chip,” in Proceedings of the IEEE Radiation Effects Data Workshop, 1–8 (2015).

N. Rezzak, J. J. Wang, D. Dsilva, and N. Jat, “TID and SEE Characterization of Microsemi’s 4th Generation Radiation Tolerant RTG4 Flash-Based FPGA,” IEEE Radiation Effects Data Workshop, 1–6 (2015).

XILINX corp. Radiation-Hardened, Space-Grade Virtex-5QV Family Overview. http://japan.xilinx.com/support.html .

XILINX corp. Virtex UltraScale+. http://www.xilinx.com/products/silicon-devices/fpga.html .

ALTERA corp. Stratix 10. FPGA & SOC. https://www.altera.co.jp/products/fpga/stratix-series/stratix-10/overview.html .

ALTERA corp. MAX 10. https://www.altera.co.jp/products/fpga/max-series/max-10/overview.html .

H. Ito and M. Watanabe, “Total ionizing dose tolerance of the serial configuration on cyclone II FPGA,” IEEE International Conference on Space Optical Systems and Applications, 1–4 (2015).

Cited By

OSA participates in Crossref's Cited-By Linking service. Citing articles from OSA journals and other participating publishers are listed here.

Alert me when this article is cited.


Figures (7)

Fig. 1
Fig. 1 Block diagram of the constructed optically reconfigurable gate array system consisting of a laser, a film, and an optically reconfigurable gate array very large scale integration (VLSI).
Fig. 2
Fig. 2 Photograph of the optically reconfigurable gate array system.
Fig. 3
Fig. 3 (a) Binary holographic memory pattern consisting of 1,200 × 1,200 pixels, calculated using a personal computer. (b) Photograph showing its recorded film (Recording IR; Agfa-Gevaert NV). The aperture size of the film is 34 mm × 23 mm. The 7.62 mm × 7.62 mm center region was used to record the binary holographic memory pattern. The other region was masked to opaque. The binary holographic memory pattern was recorded at 4,000 dots per inch using an image setter (DTR-3100; Screen Holdings Co. Ltd.).
Fig. 4
Fig. 4 Die photograph of the 5 mm × 5 mm optically reconfigurable gate array VLSI chip and magnified photographs of a configurable logic block, a configurable switching matrix, a configurable I/O block, and a photodiode cell.
Fig. 5
Fig. 5 Cell map of the optically reconfigurable gate array VLSI chip showing locations of the configurable logic blocks (L), configurable switching matrices (S), and configurable I/O blocks (I).
Fig. 6
Fig. 6 Block diagrams of (a) a configurable logic block and (b) a configurable switching matrix.
Fig. 7
Fig. 7 Detailed deterioration analysis. Panel (a) portrays a holographic memory pattern including a 2-bit adder circuit implemented on a liquid crystal spatial light modulator. Panel (b) depicts the CCD-captured configuration context pattern. Panel (c) displays a waveform of the 2-bit adder circuit implemented on the 1.9 MGy total ionizing dose optically reconfigurable gate array VLSI. Panels (d) and (e) depict detailed deterioration analysis results of propagation delays of configurable logics (c), switching matrices (S), and I/O blocks (I).

Tables (1)

Tables Icon

Table 1 Summary of chip characteristics.

Equations (5)

Equations on this page are rendered with MathJax. Learn more.

P f = n = 0 N m a x   m C n p n ( 1 p ) m n .
H ( α , β ) = i = 1 B N { exp [ j k r 1 ( x i , y i , α , β ) ] + exp [ j k r 2 ( α , β ) ] } ,
r 1 ( x i , y i , α , β ) = ( x i α ) 2 + ( y i β ) 2 + L 2 ,
r 2 ( α , β ) = α 2 + β 2 + D 2 .
H ( α , β ) = { 1 H ( α , β ) H * ( α , β ) t 1 , 0 otherwise .

Metrics