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DSP-Free Coherent Receivers for Data Center Links

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Abstract

We review low-power DSP-free coherent receiver architectures for DP-QPSK that exhibit performance comparable to their DSP-based counterparts, while consuming an estimated 4 W for 200 Gbit/s DP-QPSK in 90-nm CMOS.

© 2018 The Author(s)

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