Previous proposals of optical N×N time-division switches (TDSs) have featured architectures analogous to their electronic counterparts. Their implementations have used integrated optic 1 × N and N × 1 switch matrices as optical write and read gates, respectively,1–3 and fiber optic delay lines or bistable laser diodes (BLDs) as optical memories.1,2 These approaches have, however, several shortcomings. First, the maximum size of optical space division switches, restricted to N = 16 at the present time, limits the size of the TDS. Second, implementing optical memories with fiber optic delay lines necessitates 2N delays if all possible time slot permutations are required. (Reentrant delay lines can reduce this number to Wat the expense of amplification.2) On the other hand, BLDs can store only 1 bit of information at a time. To store B bits per time slot with BLDs would, therefore, require B × N memory elements.

© 1989 Optical Society of America

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